个性化文献订阅>文章检索

文章名     作者     期刊名     摘要     卷     期         如果没有找到您所需要的文献，请点击 ——此处申请     共12条记录   Process Variation-Aware Adaptive Cache Architecture and Management [作者：Mutyam, M; Wang, F; Krishnan, R; Narayanan, V; Kandemir, M; Xie, Y; Irwin, MJ,期刊：IEEE Transactions on Computers, 页码：865-877 , 文章类型： Article，,卷期：2009年58-7] Fabricating circuits that employ ever-smaller transistors leads to dramatic variations in critical process parameters. This in turn results in large variations in execution/access latencies of different hardware componen... Efficient Software-Based Encoding and Decoding of BCH Codes [作者：Cho, J; Sung, W,期刊：IEEE Transactions on Computers, 页码：878-889 , 文章类型： Article，,卷期：2009年58-7] Error correction software for Bose-Chaudhuri-Hochquenghem (BCH) codes is optimized for general purpose processors that do not equip hardware for Galois field arithmetic. The developed software applies parallelization wit... A Floating-Point Unit for 4D Vector Inner Product with Reduced Latency [作者：Kim, D; Kim, LS,期刊：IEEE Transactions on Computers, 页码：890-901 , 文章类型： Article，,卷期：2009年58-7] This paper presents the algorithm and implementation of a new high-performance functional unit for floating-point four-dimensional vector inner product (4D dot product; DP4), which is most frequently performed in 3D grap... Decimal Floating-Point Multiplication [作者：Erle, MA; Hickmann, BJ; Schulte, MJ,期刊：IEEE Transactions on Computers, 页码：902-916 , 文章类型： Article，,卷期：2009年58-7] Decimal multiplication is important in many commercial applications including financial analysis, banking, tax calculation, currency conversion, insurance, and accounting. This paper presents the design of two decimal fl... High-Performance Hardware Architectures for Galois Counter Mode [作者：Satoh, A; Sugawara, T; Aoki, T,期刊：IEEE Transactions on Computers, 页码：917-930 , 文章类型： Article，,卷期：2009年58-7] Various high-performance hardware architectures for Galois Counter Mode (GCM) in conjunction with various Advanced Encryption Standard (AES) circuits and multiplier-adders are proposed. A total of 17 GCM-AES circuits wer... A Process Algebraic View of Latency-Insensitive Systems [作者：Kapoor, HK,期刊：IEEE Transactions on Computers, 页码：931-944 , 文章类型： Article，,卷期：2009年58-7] Latency-insensitive (LI) systems are those which can function correctly in spite of delays along its connecting wires. This delay is assumed to be a multiple of the clock period. The paper presents a single-clock process... A Homogeneous Architecture for Power Policy Integration in Operating Systems [作者：Pettis, N; Lu, YH,期刊：IEEE Transactions on Computers, 页码：945-955 , 文章类型： Article，,卷期：2009年58-7] A significant volume of research has concentrated on operating system (OS)-directed power management. The primary focus of previous research has been the development of better policies. In this paper, we provide evidence... Frame-Based Packet-Mode Scheduling for Input-Queued Switches [作者：Lou, JY; Shen, XJ,期刊：IEEE Transactions on Computers, 页码：956-969 , 文章类型： Article，,卷期：2009年58-7] Most packet scheduling algorithms for input-queued switches operate on fixed-sized packets known as cells. In reality, communication traffic in many systems such as Internet runs on variable-sized packets. Motivated by p... Collusive Piracy Prevention in P2P Content Delivery Networks [作者：Lou, XS; Hwang, K,期刊：IEEE Transactions on Computers, 页码：970-983 , 文章类型： Article，,卷期：2009年58-7] Collusive piracy is the main source of intellectual property violations within the boundary of a P2P network. Paid clients (colluders) may illegally share copyrighted content files with unpaid clients (pirates). Such onl... Hardware Architecture for High-Performance Regular Expression Matching [作者：Lee, TH,期刊：IEEE Transactions on Computers, 页码：984-993 , 文章类型： Article，,卷期：2009年58-7] This paper presents a bitmap-based hardware architecture for the Glushkov nondeterministic finite automaton (G-NFA), which recognizes a given regular expression. We show that the inductions of the functions needed to con... Accurate Floating-Point Product and Exponentiation [作者：Graillat, S,期刊：IEEE Transactions on Computers, 页码：994-1000 , 文章类型： Article，,卷期：2009年58-7] Several different techniques and softwares intend to improve the accuracy of results computed in a fixed finite precision. Here, we focus on a method to improve the accuracy of the product of floating-point numbers. We s... Efficient Bit-Parallel GF(2(m)) Multiplier for a Large Class of Irreducible Pentanomials [作者：Cilardo, A,期刊：IEEE Transactions on Computers, 页码：1001-1008 , 文章类型： Article，,卷期：2009年58-7] This work studies efficient bit-parallel multiplication in GF(2(m)) for irreducible pentanomials, based on the so-called Shifted Polynomial Bases (SPBs). We derive a closed expression of the reduced SPB product for a cla...