- Reliability-Driven ECC Allocation for Multiple Bit Error Resilience in Processor Cache
[作者:Paul, S; Cai, F; Zhang, XM; Bhunia, S,期刊:IEEE Transactions on Computers, 页码:20-34 , 文章类型: Article,,卷期:2011年60-1]
- With increasing parameter variations in nanometer technologies, on-chip cache in processor is becoming highly vulnerable to runtime failures induced by "soft error," voltage, or thermal noise and aging effects. Nondeterm...
- Adaptive Cache Design to Enable Reliable Low-Voltage Operation
[作者:Alameldeen, AR; Chishti, Z; Wilkerson, C; Wu, W; Lu, SL,期刊:IEEE Transactions on Computers, 页码:50-63 , 文章类型: Article,,卷期:2011年60-1]
- The performance/energy trade-off is widely acknowledged as a primary design consideration for modern processors. A less discussed, though equally important, trade-off is the reliability/energy trade-off. Many design feat...
- Improving Availability of RAID-Structured Storage Systems by Workload Outsourcing
[作者:Wu, SZ; Jiang, H; Feng, D; Tian, L; Mao, B,期刊:IEEE Transactions on Computers, 页码:64-79 , 文章类型: Article,,卷期:2011年60-1]
- Due to the contention for the shared disk bandwidth, the user I/O intensity can significantly impact the performance of the online low-priority background tasks, thus reducing the reliability and availability of RAID-str...
- An Architecture for Fault-Tolerant Computation with Stochastic Logic
[作者:Qian, WK; Li, X; Riedel, MD; Bazargan, K; Lilja, DJ,期刊:IEEE Transactions on Computers, 页码:93-105 , 文章类型: Article,,卷期:2011年60-1]
- Mounting concerns over variability, defects, and noise motivate a new approach for digital circuitry: stochastic logic, that is to say, logic that operates on probabilistic signals and so can cope with errors and uncerta...
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