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[摘要]：Here, direct correlation between the microstructure of InAs nanowires (NWs) and their electronic transport behavior at room temperature is reported. pure zinc blende (ZB) InAs NWs grown on SiO2/Si substrates are characterized by a rotational twin along their growth-direction axis while wurtzite (WZ) InAs NWs grown on InAs (111)B substrates have numerous stacking faults perpendicular to their growth-direction axis with small ZB segments. In transport measurements on back-gate field-effect transistors (FETs) fabricated from both types of NWs, significantly distinct subthreshold characteristics are observed (I-on/I-off similar to 2 for ZB NWs and similar to 10(4) for WZ NWs) despite only a slight difference in their transport coefficients. This difference is attributed to spontaneous polarization charges at the WZ/ZB interfaces, which suppress carrier accumulation at the NW surface, thus enabling full depletion of the WZ NW FET channel. 2D Silvaco-Atlas simulations are used for ZB and WZ channels to analyze subthreshold current flow, and it is found that a polarization charge density of >= 10(13) cm(-2) leads to good agreement with experimentally observed subthreshold characteristics for a WZ InAs NW given surface-state densities in the 5 x 10(11)-5 X 10(12) cm(-2) range. |
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