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[摘要]：This paper presents a 1: 8 differential power divider implemented in a commercial SiGe BiCMOS process using fully shielded broadside-coupled striplines integrated vertically in the silicon interconnect stackup. The 1: 8 power divider is only 1.12 x 1.5 mm(2) including pads, and shows, 0.4-dB rms gain imbalance and < 3 degrees rms phase imbalance from 40 to 50 GHz over all eight channels, a measured power gain of 14.9 +/- 0.6 dB versus a passive divider at 45 GHz, and a 3-dB bandwidth from 37 to 52 GHz. A detailed characterization of the shielded broadside-coupled striplines is presented and agrees well,with simulations. These compact lines can be used for a variety of applications in SiGe/CMOS millimeter-wave, circuits, including differential signal distribution, miniature power dividers, matching networks, filters, couplers, and baluns. |
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