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[摘要]:We propose heuristics for the construction of variable-stride one-dimensional as well as fixed and variable-stride two-dimensional multibit tries. These multibit tries are suitable for the classification of Internet packets using a pipelined architecture. The variable-stride one-dimensional tries constructed by our heuristic require significantly less per-stage memory than what is required by optimal pipelined fixed-stride tries. In addition, the pipelined two-dimensional multibit tries constructed by our proposed heuristics are superior, for pipelined architectures, to two-dimensional multibit tries constructed by the best algorithms proposed for nonpipelined architectures. |
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