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[摘要]：A high-performance architecture of elliptic curve scalar multiplication based on the Montgomery ladder method over finite field GF(2(m)) is proposed. A pseudopipelined word-serial finite field multiplier, with word size w, suitable for the scalar multiplication is also developed. Implemented in hardware, this system performs a scalar multiplication in approximately 6 inverted right perpendicular m/w inverted left perpendicular (m - 1) clock cycles, and the gate delay in the critical path is equal to T-AND + inverted right perpendicular log(2)(w/k) inverted left perpendicular T-XOR, where T-AND and T-XOR are delays due to two-input AND and XOR gates, respectively, and 1 <= k << w is used to shorten the critical path. |
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