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Delay Uncertainty Reduction by Gate Splitting

  作者 Agarwal, V; Sun, J; Wang, JM  
  选自 期刊  IEEE Transactions on Circuits and Systems II;  卷期  2009年56-4;  页码  295-299  
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[摘要]Traditional timing-variation. reduction techniques are only able to decrease gate delay variation by incurring a delay overhead. In this brief, we propose a novel and effective splitting-based variation reduction technique for gates. We developed a new tool called Timing Uncertainty Reduction by Gate Splitting (TURGS), which reduces the timing variations of a circuit and presents little delay overhead at the primary output. Our experimental results show that TURGS achieves up to 20% improvement in timing variation for gates.

 
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