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[摘要]：A 10-Gb/s low-power analog equalizer for a 10-m coaxial cable has been realized in 0.13-mu m CMOS technology. To compensate the cable loss of 20 dB at 5 GHz, this equalizer with an interleaved active feedback topology is proposed without using inductors. Moreover, additional capacitive and resistive source degenerations are incorporated to meet low-frequency losses. This circuit consumes only 14 mW (excluding the output buffer) from a 1.2-V supply with the output swing up to 400 mV(pp), and it occupies 0.38 x 0.34 mm(2). For 8-, 9-, and 10-Gb/s pseudorandom binary sequences (PRBSs) of 2(31) - 1, the measured maximum peak-to-peak jitters are 26, 34, and 40 ps, respectively, and the measured bit error rate (BER) is less than 10(-12). |
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