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On the Attenuation of DAC Aliases Through Multiphase Clocking

  作者 van Zeijl, PTM; Collados, M  
  选自 期刊  IEEE Transactions on Circuits and Systems II;  卷期  2009年56-3;  页码  190-194  
  关联知识点  
 

[摘要]L-fold interpolation can be used to lower aliases of digital-to-analog converters (DACs). L-fold interpolation uses multiple DACs, each clocked with different phases of a single clock frequency with each DAC using the same signal data. The literature on this topic indicates that lowering the aliases can only be done by increasing the number of DACs and clock phases. This brief shows that by proper selection of clock phases, precise cancelling of certain aliases for a two-phase clock with two DACs is already possible. The cancellation of aliases helps reduce unwanted spurious emissions when DACs are used as amplitude modulators in polar transmitters.

 
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