[摘要]：This paper presents the design of a direct-injection divide-by-3 frequency divider operating at the K-band. The divider is implemented in a 0.18-mu m CMOS process. The measured free-running frequency of the divider is 7.96 GHz. By utilizing a floating-source differential injector and without a varactor tuning in the divider core, the total locking range is 3.2 GHz with a power consumption of 8.28 mW from a supply voltage of 0.9 V. The total power consumption of the buffers is 9.54 mW from a supply voltage of 1.8 V. The measured phase noise of the divider is 141.3 dBc/Hz at 1-MHz offset when the input referred signal with a phase noise of -132.8 dBc/Hz at 1-MHz offset from 24 GHz. The phase-noise difference of 8.5 dB is close to the theoretical value of 9.5 dB for division-by-3. The output power of the divider is more than -11dBm over the whole locking range.
