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A low-power programmable DLL-based clock generator with wide-range antiharmonic lock

  作者 Koo, Jabeom (1); Ok, Sunghwa (1); Kim, Chulwoo (1)  
  选自 期刊  IEEE Transactions on Circuits and Systems II;  卷期  2009年56-1;  页码  21-25  
  关联知识点  
 

[摘要]A delay-locked-loop (DLL)-based clock generator for dynamic frequency scaling has been developed in a 0.13-μm CMOS technology. The proposed clock generator can generate a wide range of the multiplied clock signals ranging from 125 MHz to 2 GHz. In addi

 
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