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Evaluation of Power Constant Dual-Rail Logics Countermeasures against DPA with Design Time Security Metrics

  作者 Guilley, S; Sauvage, L; Flament, F; Vong, VN; Hoogvorst, P; Pacalet, R  
  选自 期刊  IEEE Transactions on Computers;  卷期  2010年59-9;  页码  1250-1263  
  关联知识点  
 

[摘要]Cryptographic circuits are nowadays subject to attacks that no longer focus on the algorithm but rather on its physical implementation. Attacks exploiting information leaked by the hardware implementation are called side-channel attacks (SCAs). Among thes

 
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