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文章名     作者     期刊名     摘要     卷     期         如果没有找到您所需要的文献，请点击 ——此处申请     共18条记录   SiGe Analog AGC Circuit for an 802.11a WLAN Direct Conversion Receiver [作者：Alegre, JP; Celma, S; Calvo, B; Fiebig, N; Haider, S,期刊：IEEE Transactions on Circuits and Systems II, 页码：93-96 , 文章类型： Article，,卷期：2009年56-2] This brief presents a baseband automatic gain control (AGC) circuit for an IEEE 802.11a wireless local area network (WLAN) direct conversion receiver. The whole receiver is to be fully integrated in a low-cost 0.25-mu m ... A 10-Gb/s Inductorless CMOS Analog Equalizer With an Interleaved Active Feedback Topology [作者：Lu, JH; Chen, KH; Liu, SI,期刊：IEEE Transactions on Circuits and Systems II, 页码：97-101 , 文章类型： Article，,卷期：2009年56-2] A 10-Gb/s low-power analog equalizer for a 10-m coaxial cable has been realized in 0.13-mu m CMOS technology. To compensate the cable loss of 20 dB at 5 GHz, this equalizer with an interleaved active feedback topology is... The Reduction of the Duration of the Transient Response in a Class of Continuous-Time LTV Filters [作者：de Anda, MAG; Reyes, AS; Martinez, LH; Piskorowski, J; Kaszynski, R,期刊：IEEE Transactions on Circuits and Systems II, 页码：102-106 , 文章类型： Article，,卷期：2009年56-2] Linear time-varying (LTV) systems have found a niche of their own in the processing of continuous-time signals. In this brief, it is shown how the reduction of the duration of the transient response of a class of continu... A Single-PLL UWB Frequency Synthesizer Using Multiphase Coupled Ring Oscillator and Current-Reused Multiplier [作者：Chang, JY; Fan, CW; Liang, CF; Liu, SI,期刊：IEEE Transactions on Circuits and Systems II, 页码：107-111 , 文章类型： Article，,卷期：2009年56-2] A single phase-locked loop (PLL) frequency synthesizer for a Mode-1 multiband orthogonal frequency-division multiplexing (MB-OFDM) ultrawideband (UWB) system is realized in 0.13-mu m CMOS. A current-reused multiply-by-1.... Hardware Reduction in Digital Delta-Sigma Modulators Via Error Masking-Part II: SQ-DDSM [作者：Ye, ZP; Kennedy, MP,期刊：IEEE Transactions on Circuits and Systems II, 页码：112-116 , 文章类型： Article，,卷期：2009年56-2] In this two-part paper, a design methodology for reduced-complexity digital delta-sigma modulators (DDSMs) based on error masking is presented. Rules for selecting the wordlengths of the stages in multistage architecture... Jitter Analysis and a Benchmarking Figure-of-Merit for Phase-Locked Loops [作者：Gao, X; Klumperink, EAM; Geraedts, PFJ; Nauta, B,期刊：IEEE Transactions on Circuits and Systems II, 页码：117-121 , 文章类型： Article，,卷期：2009年56-2] This brief analyzes the jitter as well as the power dissipation of phase-locked loops (PLLs). It aims at defining a benchmark figure-of-merit (FOM) that is compatible with the well-known FOM for oscillators but now exten... Design and Analysis of UHF Micropower CMOS DTMOST Rectifiers [作者：Teh, YK; Mohd-Yasin, F; Choong, F; Reaz, MI; Kordesch, AV,期刊：IEEE Transactions on Circuits and Systems II, 页码：122-126 , 文章类型： Article，,卷期：2009年56-2] Design and analysis of ultrahigh-frequency (UHF) micropower rectifiers based on a diode-connected dynamic threshold MOSFET (DTMOST) is discussed. An analytical design model for DTMOST rectifiers is derived based on curve... Improving Power-Delay Performance of Ultra-Low-Power Subthreshold SCL Circuits [作者：Tajalli, A; Alioto, M; Leblebici, Y,期刊：IEEE Transactions on Circuits and Systems II, 页码：127-131 , 文章类型： Article，,卷期：2009年56-2] This brief presents a technique for improving the power-delay performance of subthreshold source-coupled logic (SCL) circuits. Based on the proposed approach, a source-follower buffer stage is used at the output of each ... Analysis of the Spur Characteristics of Edge-Combining DLL-Based Frequency Multipliers [作者：Casha, O; Grech, I; Badets, F; Morche, D; Micallef, J,期刊：IEEE Transactions on Circuits and Systems II, 页码：132-136 , 文章类型： Article，,卷期：2009年56-2] A complete analysis of the spur characteristics of edge-combining delay-locked loop (DLL)-based frequency multipliers is presented in this brief. The novelty of this analysis is the fact that it can be used to estimate t... Low-Cost 14-Bit Current-Steering DAC With a Randomized Thermometer-Coding Method [作者：Lee, DH; Kuo, TH; Wen, KL,期刊：IEEE Transactions on Circuits and Systems II, 页码：137-141 , 文章类型： Article，,卷期：2009年56-2] A dynamic element-matching (DEM) method, i.e., randomized thermometer coding (RTC), for low-cost current-steering digital-to-analog converter (DAC),design is proposed. The proposed RTC method exhibits randomized starting... A Phase-Locked Loop With Self-Calibrated Charge Pumps in 3-mu m LTPS-TFT Technology [作者：Lin, WM; Liu, SI; Kuo, CH; Li, CH; Hsieh, YJ; Liu, CT,期刊：IEEE Transactions on Circuits and Systems II, 页码：142-146 , 文章类型： Article，,卷期：2009年56-2] A phase-locked loop (PLL) with self-calibrated charge pumps (CPs) has been fabricated in a 3-mu m low-temperature polysilicon thin-film transistor (LTPS-TFT) technology. A voltage scaler and self-calibrated CPs are used ... Optimal Ladder Filters [作者：Groenewold, G,期刊：IEEE Transactions on Circuits and Systems II, 页码：147-151 , 文章类型： Article，,卷期：2009年56-2] Optimizing the dynamic range of active filters through filter network optimization can lead to significant savings in chip area and power consumption. By restricting the filters to be ladder filters, it is possible to li... An Integrated Switching DC-DC Converter With Dual-Mode Pulse-Train/PWM Control [作者：Luo, F; Ma, DS,期刊：IEEE Transactions on Circuits and Systems II, 页码：152-156 , 文章类型： Article，,卷期：2009年56-2] This brief presents an integrated switching converter with a dual-mode control scheme. A pulse-train (PT) control employing a combination of four pulse control patterns is proposed to achieve optimal regulation performan... Time-Domain Analysis of a Lossy Nonuniform Transmission Line [作者：Jeong, J; Nevels, R,期刊：IEEE Transactions on Circuits and Systems II, 页码：157-161 , 文章类型： Article，,卷期：2009年56-2] An analytical solution of the coupled Telegrapher's equations for the voltage and current on a homogeneous lossy transmission line is presented. The resulting expression is obtained in the form of an exact time-domain pr... Compact Electrothermal Macromodeling of Photovoltaic Modules [作者：Maffezzoni, P; D'Amore, D,期刊：IEEE Transactions on Circuits and Systems II, 页码：162-166 , 文章类型： Article，,卷期：2009年56-2] This brief presents an original compact electrothermal macromodel of a photovoltaic module composed of a large number of series-connected solar cells. The model is able to properly incorporate the effect of a uniform tem... Efficient Hamming Weight Comparators for Binary Vectors Based on Accumulative and Up/Down Parallel Counters [作者：Parhami, B,期刊：IEEE Transactions on Circuits and Systems II, 页码：167-171 , 文章类型： Article，,卷期：2009年56-2] New counting-based methods for comparing the Hamming weight of a binary vector with a constant, as well as comparing the Hamming weights of two input vectors, are proposed. It is shown that the proposed comparators are f...