- A Complexity-Effective Out-of-Order Retirement Microarchitecture
[作者:Marti, SP; Borras, JS; Rodriguez, PL; Tena, RU; Marin, JD,期刊:IEEE Transactions on Computers, 页码:1626-1639 , 文章类型: Article,,卷期:2009年58-12]
- Current superscalar processors commit instructions in program order by using a reorder buffer ( ROB). The ROB provides support for speculation, precise exceptions, and register reclamation. However, committing instructio...
- Comments on "Leading-One Prediction with Concurrent Position Correction"
[作者:Ji, R; Ling, ZQ; Zeng, XJ; Sui, BC; Chen, L; Zhang, JF; Feng, YJ; Luo, G,期刊:IEEE Transactions on Computers, 页码:1726-1727 , 文章类型: Editorial Material,,卷期:2009年58-12]
- In this report, we first point out and analyse an error in the implementation of the pre-encoding logic in the LOP module proposed in [1], and then present a modification method.
- An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization
[作者:Kim, JS; Deng, LP; Mangalagiri, P; Irick, K; Sobti, K; Kandemir, M; Narayanan, V; Chakrabarti, C; Pitsianis, N; Sun, XB,期刊:IEEE Transactions on Computers, 页码:1654-1667 , 文章类型: Article,,卷期:2009年58-12]
- This paper describes TANOR, an automated framework for designing hardware accelerators for numerical computation on reconfigurable platforms. Applications utilizing numerical algorithms on large-size data sets require hi...
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