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文章名     作者     期刊名     摘要     卷     期         如果没有找到您所需要的文献，请点击 ——此处申请     共14条记录   ReviveNet: A Self-Adaptive Architecture for Improving Lifetime Reliability via Localized Timing Adaptation [作者：Yan, GH; Han, YH; Li, XW,期刊：IEEE Transactions on Computers, 页码：1219-1232 , 文章类型： 期刊论文，,卷期：2011年60-9] The aggressive technology scaling poses serious challenges to lifetime reliability. A parament challenge comes from a variety of aging mechanisms that can cause gradual performance degradation of circuits. Prior work sho... Concurrent Error Detection in Montgomery Multiplication over Binary Extension Fields [作者：Hariri, A; Reyhani-Masoleh, A,期刊：IEEE Transactions on Computers, 页码：1341-1353 , 文章类型： 期刊论文，,卷期：2011年60-9] Multiplication is one of the most important operations in finite field arithmetic. It is used in cryptographic and coding applications, such as elliptic curve cryptography and Reed-Solomon codes. In this paper, we consid... A Low-Power High-Performance Concurrent Fault Detection Approach for the Composite Field S-Box and Inverse S-Box [作者：Mozaffari-Kermani, M; Reyhani-Masoleh, A,期刊：IEEE Transactions on Computers, 页码：1327-1340 , 文章类型： 期刊论文，,卷期：2011年60-9] The high level of security and the fast hardware and software implementations of the Advanced Encryption Standard have made it the first choice for many critical applications. Nevertheless, the transient and permanent in... Efficient Online Self-Checking Modulo 2(n)+1 Multiplier Design [作者：Hong, W; Modugu, R; Choi, M,期刊：IEEE Transactions on Computers, 页码：1354-1365 , 文章类型： 期刊论文，,卷期：2011年60-9] Modulo 2(n) + 1 multiplier is one of the critical components in the area of data security applications such as International Data Encryption Algorithm (IDEA), digital signal processing, and fault-tolerant systems that de... Guided Probabilistic Checksums for Error Control in Low-Power Digital Filters [作者：Nisar, MM; Chatterjee, A,期刊：IEEE Transactions on Computers, 页码：1313-1326 , 文章类型： 期刊论文，,卷期：2011年60-9] In many DSP applications (image and voice processing), several dBs of SNR loss can be tolerated without noticeable impact on application level performance. For power optimization in such applications, voltage overscaling... Modeling Yield, Cost, and Quality of a Spare-Enhanced Multicore Chip [作者：Shamshiri, S; Cheng, KT,期刊：IEEE Transactions on Computers, 页码：1246-1259 , 文章类型： 期刊论文，,卷期：2011年60-9] It becomes increasingly difficult to achieve a high manufacturing yield for multicore chips due to larger chip sizes, higher device densities, and greater failure rates. By adding a limited number of spare cores and wire... Time-Multiplexed Online Checking [作者：Gao, M; Chang, HM; Lisherness, P; Cheng, KT,期刊：IEEE Transactions on Computers, 页码：1300-1312 , 文章类型： 期刊论文，,卷期：2011年60-9] There is a growing demand for online hardware checking capability to cope with increasing in-field failures resulting from variability and reliability problems. While many online checking schemes have been proposed, thei... A Comparative Study of System-Level Energy Management Methods for Fault-Tolerant Hard Real-Time Systems [作者：Aminzadeh, S; Ejlali, A,期刊：IEEE Transactions on Computers, 页码：1288-1299 , 文章类型： 期刊论文，,卷期：2011年60-9] Low energy consumption and fault tolerance are often key objectives in the design of real-time embedded systems. However, these objectives are at odds, and there is a trade-off between them. Real-time systems usually use... Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller [作者：Maniatakos, M; Karimi, N; Tirumurti, C; Jas, A; Makris, Y,期刊：IEEE Transactions on Computers, 页码：1260-1273 , 文章类型： 期刊论文，,卷期：2011年60-9] We investigate the correlation between low-level faults in the control logic of a modern microprocessor and their instructionlevel impact on the execution of typical workload. Such information can prove immensely useful ... CEDA: Control-Flow Error Detection Using Assertions [作者：Vemu, R; Abraham, JA,期刊：IEEE Transactions on Computers, 页码：1233-1245 , 文章类型： 期刊论文，,卷期：2011年60-9] This paper presents an efficient software technique, control-flow error detection through assertions (CEDA), for online detection of control-flow errors. Extra instructions are automatically embedded into the program at ... Analytical Calculation of the Maximum Error for a Family of Truncated Multipliers Providing Minimum Mean Square Error [作者：Garofalo, V; Petra, N; Napoli, E,期刊：IEEE Transactions on Computers, 页码：1366-1371 , 文章类型： 期刊论文，,卷期：2011年60-9] A truncated multiplier is a multiplier with two n bit operands that produces a n bit result. Truncated multipliers discard some of the partial products of a complete multiplier to trade off accuracy with hardware cost. C... On-the-Fly Algorithms and Sequential Machines [作者：Pippenger, N,期刊：IEEE Transactions on Computers, 页码：1372-1375 , 文章类型： 期刊论文，,卷期：2011年60-9] Frougny has presented a method that generalizes various "on-the-fly" operations that have been presented, mainly in connection with computer arithmetic. First, we shall trace the origin of this method to its source, whic... Guest Editors' Introduction: Special Section on Concurrent On-Line Testing and Error/Fault Resilience of Digital Systems [作者：Metra, C; Galivanche, R,期刊：IEEE Transactions on Computers, 页码：1217-1218 , 文章类型： 期刊论文，,卷期：2011年60-9] Workload-Cognizant Concurrent Error Detection in the Scheduler of a Modern Microprocessor [作者：Karimi, N; Maniatakos, M; Jas, A; Tirumurti, C; Makris, Y,期刊：IEEE Transactions on Computers, 页码：1274-1287 , 文章类型： 期刊论文，,卷期：2011年60-9] We present a Concurrent Error Detection (CED) scheme for the Scheduler of a modern microprocessor. The proposed CED scheme is based on monitoring a set of invariances imposed through added hardware, violation of which si...